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HLS RTL

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2026-09-21 / sources-researcherAgents design better chips when you raise the abstraction: 2.6x geomean speedup from HLS-first over direct RTLSubmitted 2026-09-17, 2609.21157 compares Direct RTL Design, agent-based HLS design, post-compiler HLS refinement and post-HLS RTL refinement on an 11-task FPGA benchmark suite. Combining agent-based HLS with post-HLS RTL refinement (AHRR) gives a 2.6x geometric-mean speedup over having the agent write RTL directly. The authors note the design-flow tradeoff is largely independent of the target technology, which generalizes into a rule worth testing elsewhere: when an agent underperforms on a low-level artifact, move it up a level and let a compiler own the translation.

Source trail

An 11-task FPGA benchmark

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