LLMs for Secure Hardware Design: Comprehensive Review of Opportunities and Attack Surfaces

arXiv·medium signal

In-depth analysis of LLM integration into Electronic Design Automation and hardware security, covering RTL code generation, testbench automation, and specification-to-silicon workflows. The review documents both capabilities and severe vulnerabilities — LLMs can introduce hardware trojans, side-channel leaks, and IP theft vectors while generating functionally correct designs. Essential reading for semiconductor teams adopting AI-assisted design.