'Hourglass Reasoning' Boosts ARC-AGI-2 by 14 Points and Nearly Doubles Verilog Synthesis Accuracy

arXiv·high signal

Think Through a Bottleneck: Hourglass Reasoning (arXiv 2607.11696) enforces strict isolation between an induction stage that distills examples into a schema/rule and a deduction stage, passing only compressed symbolic information between them. It improves ARC-AGI-2 best-of-5 accuracy by +14 points and lifts ChipBench Verilog synthesis from 31% to 58% with GPT-5.5. A practical architecture pattern for rigorous multi-step induction.