Chips and Cheese Teardown: AMD's MI455X Is 432GB of HBM4 at 23.3 TB/s and the Largest Chip Ever on CoWoS-L

Chips and Cheese (corroborated by Phoronix, Tom's Hardware, VideoCardz)·medium signal

A deep technical breakdown published July 23–24 details the MI455X as eight Accelerator Complex Dies on TSMC N2 plus two I/O dies and two fabric-and-cache dies on N3, with twelve HBM4 stacks on 2048-bit buses — 192 channels, 432GB per GPU at 23.3 TB/s — and 256 Work Group Processors clocking to 2.4GHz for up to 40.26 PFLOPS of OCP MXFP4. The Helios rack pairs four MI455X with one 96-core EPYC 9006 SP7 per compute tray, and six switch trays deliver 432 links at 200Gb/s each for 260 TB/s bidirectional scale-up bandwidth. This is the part builders can actually reason about: 432GB per accelerator means a 1.4TB MXFP4 model like Kimi K3 fits in four GPUs rather than a rack.