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llama.cpp's Hexagon backend gets 64-bit DMA mappings in an 8,200-line rewrite
PR #29197 (merged 2026-09-21, 51 files, +8222/-6109) overhauls llama.cpp's Hexagon NPU buffer and DMA handling to support 64-bit extended mappings on Hexagon v81 and newer (Snapdragon Gen5, X2-Elite, IQ10), letting buffers above the 4 GB NPU virtual address space be mapped once instead of dynamically mapped and unmapped during inference. MUL_MAT, FA, GDN and SSM_CONV were rewritten to stop reading tensors through DDR->L2->HVX, the v73 large-transaction fallback became a separate ring buffer, and the author shipped `ggml-hexagon-inspect.py` to disassemble kernels and flag register spills. It is on by default (`GGML_HEXAGON_DMA64=0` disables it), with gains called out for gemma-4-26B and gpt-oss-20b.
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