IBM's chip runs Arm and Z on the same cores

IBM showed a mainframe chip whose 11 cores each run both Arm and IBM Z instruction sets, switching between them in nanoseconds, at Hot Chips on August 24.

Banks running AI fraud-scoring models next to Z-based transaction processing pay a network hop bridging the two systems. Putting both instruction sets on the same core removes that hop.

The chip is built on 2nm and clocks above 5.7GHz at base speed, with on-chip AI inference accelerators for fraud detection and a dedicated DPU for I/O, per VentureBeat.

IBM isn't promising this soon. Availability is expected around 2028, three years out from a chip design cycle where AI accelerators change generation every year or two.

The bet is narrow. This chip will matter to banks bolting fraud detection onto decades-old COBOL transaction systems, not to anyone chasing general AI throughput. Whether the latency it solves still counts as a problem in 2028 is the open question IBM hasn't answered.