vLLM was writing speculative-decode KV into other requests' prefix-cache blocks and poisoning them with NaN.

PR #56734, merged September 21, fixes KV corruption in Model Runner V2 spec decoding under data parallelism. An idle DP rank's dummy batch ran the drafter's multi-step decode through persistent per-slot block tables with idx_mapping = arange(num_reqs), writing drafter K/V into offsets 1 through k-1 of the first block of whatever request last held that slot. On GLM-5.2 across 4x GB200 with MTP k=5, DP=4 EP and fp8 KV, the symptom was exactly-zero MTP acceptance that latched onto a conversation and cleared only after POST /reset_prefix_cache. Dumped rows were fp8 0x7F NaN. The guard had to live in the CUDA kernel rather than Python because the fused multi-step path recomputes slot mappings inside the captured graph.