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Mike Ayles / Hacker News

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2026-08-11

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  1. 2026-08-11 / NEWSA 3.16M-Parameter LLM Hits 21,300 tok/s on a $250 FPGA by Never Touching DDRAn August 10 writeup demonstrates a 3.16M-parameter INT4 transformer — about 1.5 MB of weights, trained on TinyStories — running entirely in on-chip SRAM on a $250 Xilinx Kria KV260 board, with zero DDR in the token-generation loop. Measured peak aggregate throughput is 59,965 tok/s at 200 MHz (N=16, bit-exact, three runs of three); the live demo sustains ~21,300 tok/s under 2,000 concurrent connections. For comparison the same board's ARM A53 cores manage 11 tok/s and a laptop RTX 3050 Ti manages 719 — the entire result comes from trading the 20 GB/s shared DDR bottleneck for hundreds of GB/s of on-chip bandwidth, which is the argument for small-model-on-cheap-silicon edge inference in one number.
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