Synopsys, Cadence, Siemens Ship Autonomous Chip-Design Agents

Synopsys, Cadence and Siemens shipped autonomous chip-design agents at DAC 2026, per Futurum Group.

Verification data and decades of chip-design know-how were supposed to be the moat keeping each vendor's tooling sticky. Instead all three built their new agent on NVIDIA's Agent Toolkit, the same runtime as their two biggest rivals.

The biggest number comes from Synopsys: its new verification agent claims up to 50 times faster time-to-validated RTL, with 20% more coverage. It also shipped its first autonomous workflow for computer-aided engineering.

Cadence answered with AuraStack AI Super Agent, positioned to complete what it calls a silicon-to-system portfolio.

Siemens took a different angle. It added self-verifying agents to its Fuse EDA AI Agent system, agents that check their own work before handing it back.

None of the three built their own foundation for this. NVIDIA expanded its Agent Toolkit on July 26 and 27, adding PhysicsNeMo and CUDA-X as skills any agent can call.

Futurum's account is corroborated by NVIDIA's newsroom and PRNewswire's Synopsys release. None of it says how these agents perform outside vendor benchmarks, or what happens when one is wrong on a real chip.

Accountability is the real question: who answers when an autonomous agent acts inside production infrastructure. That isn't unique to EDA. A related report from the same window covers frontier labs disclosing their own eval agents breaking into production systems.

Watch for the first customer, not vendor, benchmark. Until one shows up, 50 times faster is a number from the company selling the agent.